The present invention relates to integrated circuits (IC) measurement generally, and particularly to wafer-type probes for measurement of electrical characteristics of small planar devices (IC elements) fabricated on semiconductive or dielectric wafers.
Wafer probes provide temporary electrical contacts between test equipment and the very small terminal points (bonding pads) of IC elements on semiconductive wafers. Use of wafer probes permits operation and testing of IC elements prior to separating, bonding and packaging the individual IC elements on the wafer.
A major problem with most wafer probes is their inability to permit accurate measurements of the electrical characteristics of the devices at high frequencies (e.g., when signal frequencies above approximately 2 GHz are applied). These inaccuracies arise from high frequency characteristics of the probes themselves. At high frequencies, excessive probe inductance or changing probe radiation impedance can greatly reduce the accuracy of tests made. Although the use of computer-corrected measurements may reduce the adverse effect of excess inductance to some extent, the radiation is generally not repeatable and, therefore, not correctable.
These inaccuracies were significantly reduced by the improved wafer probe described and claimed in prior applications, Ser. No. 318,084 filed Nov. 4, 1981 now abandoned, and Ser. No. 605,462 filed Apr 30, 1984, now U.S. Pat. No. 4,697,143 . These prior probes provided for reduction of inductance of the probe tip to less than fifty pH. The wafer probes employed microstrip or coplanar lines sufficiently narrowed on a tapered support to make good contact with bonding pads of the device to be tested, and to conduct signals to the pads from conventional fifty ohm coaxial cables. The fifty ohm environment was brought close to the device or chip being measured, reducing radiation and the like. Absorptive material was also provided for preventing undesired resonance and radiation.
In addition to connecting signal lines between the device under test and a measurement instrument, some provision must be made for supplying power to the device under test. Thus, the device under test may include a plurality of bonding pads, some of which are to receive signals and others which are to be connected to a source of voltage or grounded. It is desirable that the power connection be of low impedance because the current drawn may have frequency components covering a very broad bandwidth, this being especially true for digital circuits. Thus, a data input may have a long series of values which result in little current change, and then a bit may occur which changes many internal logic states and forces a rapid change in current. Then this state may remain constant for a comparatively long period. Excessive inductance in the power supply circuit can result in a voltage changing by L.times.dI/dt. Previous probing (and packaging) techniques have relied on placing a bypass capacitor near the device under test, at the tip of the probe or next to the chip or the like in the package, to absorb current fluctuations. However, the physical proximity of the capacitor, and the inductance of the connection from the capacitor to the chip, has a resonant frequency which can degrade the bypass quality. Moreover, if several inputs must be bypassed, the problem is aggravated since it is more difficult to place several capacitors in close proximity to the end of a probe next to the device.